A display panel of a display device comprises an array substrate. The array substrate comprises a plurality of gate lines and a plurality of data lines intersecting with each other in different planes. The gate lines and the data lines divide the array substrate into a plurality of pixel units, and a thin film transistor is provided in each pixel unit. Generally, the thin film transistor in the conventional array substrate is an amorphous silicon thin film transistor, and a mobility of the amorphous silicon thin film transistor is about 0.5 cmWs.
As a size of the panel display has been continuously increased in recent years, a frequency of a driving circuit is continuously increased, and the mobility of the existing amorphous silicon thin film transistor can hardly meet the demand. For example, when a size of a liquid crystal display exceeds 80 inches, a driving frequency should be 120 Hz. In this case, the mobility of the thin film transistor is required to be larger than 1 cmWs, and thus apparently, the mobility of the existing amorphous silicon thin film transistor can hardly meet the above requirement.
An oxide thin film transistor has advantages of high mobility, good uniformity, transparency, simple fabricating process and the like, and can better meet the requirement on the mobility of the thin film transistor for a large-size display.
FIG. 1 is a cross-sectional view illustrating a typical array substrate comprising the oxide thin film transistor. As shown in FIG. 1, since a hydrogen bond has much influence on an active layer made of metal oxide, the array substrate comprises an etch stop layer 20 provided on an active layer 10 of the oxide thin film transistor, and a source 30 and a drain 40 of the oxide thin film transistor are connected with the active layer 10 of the oxide thin film transistor through via holes penetrating through the etch stop layer 20, so that etchant may be prevented from penetrating into the active layer when etching the source and the drain of the oxide thin film transistor.
Generally, the etch stop layer 20 is made by use of silicon oxide in order to save the fabricating cost. However, since the compactness of the silicon oxide is poor, bubble-shaped gaps exist between the source and drain metal layer and the etch stop layer 20 in the thin film transistor. When etching the source and drain metal layer, the etchant may penetrate into contact surfaces between a data line 50 and the etch stop layer 20 along the bubble-shaped gaps, resulting in corrosion of portions of the data line 50 connected with the source 30 of the thin film transistor, thereby reducing the overall quality of the array substrate.
Therefore, how to prevent the etchant from corroding the portions of the data line connected with the source of the thin film transistor becomes a problem to be solved in the art.